Allinson, N. M., Howard, N. J., Kolcz, A. R. et al and Tyrrell, A. M.
(1994)
Image processing applications using a novel parallel computing machine based on reconfigurable logic.
In: IEE Colloquium on Parallel Architectures for Image Processing, 26 May 1994, London.
Full content URL: http://ieeexplore.ieee.org/xpls/abs_all.jsp?arnumb...
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Item Type: | Conference or Workshop contribution (Paper) |
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Item Status: | Live Archive |
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Abstract
Zelig is a 32 physical node fine-grained computer employing field-programmable gate arrays. Its application to the high speed implementation of various image pre-processing operations (in particular binary morphology) is described together with typical speed-up results
Additional Information: | Zelig is a 32 physical node fine-grained computer employing field-programmable gate arrays. Its application to the high speed implementation of various image pre-processing operations (in particular binary morphology) is described together with typical speed-up results |
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Keywords: | image processing equipment, logic arrays, parallel machines, Zelig |
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Subjects: | G Mathematical and Computer Sciences > G740 Computer Vision |
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Divisions: | College of Science > School of Computer Science |
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ID Code: | 5075 |
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Deposited On: | 20 Apr 2012 14:18 |
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