Abstract

In this paper, a Naive Bayes classifier was simplified and implemented as a multi-class classification tool for binary
feature vectors. It was designed on FPGA using very limited hardware resources and runs quickly and efficiently in both training and testing phases. It was first tested on a handwriting digital number dataset, and then applied in the
visual object recognition on a single FPGA based visual surveillance system. It was compared with a binary Self Organizing Map (bSOM) using tri-states operation on FPGA, and the experimental results demonstrated both its higher
performance and lower resource usage on the FPGA chip.