Error-power tradeoffs in QCA design

Srivastava, S., Sarkar, S. and Bhanja, S. (2008) Error-power tradeoffs in QCA design. In: Nanotechnology, 2008. NANO '08. 8th IEEE Conference on, 18-21 August 2008, Arlington, TX.

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Item Type:Conference or Workshop contribution (Paper)
Item Status:Live Archive


In this work we present an error-power tradeoff study in a Quantum-dot Cellular Automata (QCA) circuit design. Device parameter variation to optimize performance is a very crucial step in the development of a technology. In this work we vary the maximum kink energy of a QCA circuit to perform an error-power tradeoff study in QCA design. We make use of graphical probabilistic models to estimate polarization errors and non-adiabatic energy dissipated in a clocked QCA circuit and demonstrate the tradeoff studies on the basic QCA circuits such as majority gate and inverter. We also show how this study can be used by comparing two single bit adder designs. The study will be of great use to designers and fabrication scientists to choose the most optimum size and spacing of QCA cells to fabricate QCA logic designs.

Keywords:logic design, quantum computing, quantum dots, QCA circuit design, QCA logic design, clocked QCA circuit, error-power tradeoffs, graphical probabilistic model, maximum kink energy, nonadiabatic energy dissipation, polarization errors, quantum-dot cellular automata, Circuit synthesis, Polarization, Power dissipation, Quantum cellular automata
Subjects:H Engineering > H611 Microelectronic Engineering
H Engineering > H620 Electrical Engineering
H Engineering > H610 Electronic Engineering
H Engineering > H612 Integrated Circuit Design
Divisions:College of Science > School of Computer Science
College of Science > School of Engineering
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ID Code:10732
Deposited On:26 Jul 2013 09:27

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