Items where Subject is "H Engineering > H612 Integrated Circuit Design"

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Number of items at this level: 13.

E

Esposito, Michela and Anaxagoras, Thalis and Zheng, Y. and Speller, Robert and Evans, Philip and Allinson, Nigel and Wells, Kevin (2014) Performance of a novel wafer scale CMOS active pixel sensor for bio-medical imaging. Physics in Medicine and Biology, 59 (13). pp. 3533-3554. ISSN 0031-9155

L

Liu, Weiqiang and Srivastava, Saket and Lu, Liang and O'Neill, M. and Swartzlander, E. E. (2012) Are QCA cryptographic circuits resistant to power analysis attack? Nanotechnology, IEEE Transactions on, 11 (6). pp. 1239-1251. ISSN 1536-125X

M

Melouki, Aissa and Srivastava, Saket and Al-Hashimi, Bashir M. (2010) Fault-tolerance techniques for hybrid CMOS/nanoarchitecture. Computers Digital Techniques, IET, 4 (3). pp. 240-250. ISSN 1751-8601

S

Srivastava, S. and Asthana, A. and Bhanja, S. and Sarkar, S. (2011) QCAPro: an error-power estimation tool for QCA circuit design. In: Circuits and Systems (ISCAS), 2011 IEEE International Symposium on, 15-18 May 2011, Rio de Janeiro.

Srivastava, S. and Bhanja, S. (2006) Bayesian macromodeling for circuit level QCA design. In: Nanotechnology, 2006. IEEE-NANO 2006. Sixth IEEE Conference on, 17-20 June 2006.

Srivastava, S. and Melouki, A. and Al-Hashimi, B. M. (2009) Defect tolerance in hybrid nano/CMOS architecture using tagging mechanism. In: Nanoscale Architectures, 2009. NANOARCH '09. IEEE/ACM International Symposium on, 30-31 July 2009, San Francisco, CA.

Srivastava, S. and Melouki, A. and Al-Hashimi, B. M. (2009) Repair techniques for hybrid Nano/CMOS computational architecture. In: Nanotechnology, 2009. IEEE-NANO 2009. 9th IEEE Conference on, 26-30 July 2009, Genoa.

Srivastava, S. and Melouki, A. and Al-Hashimi, B. M. (2011) Tagged repair techniques for defect tolerance in hybrid nano/CMOS architecture. Nanotechnology, IEEE Transactions on, 10 (3). pp. 424-432. ISSN 1536-125X

Srivastava, S. and Sarkar, S. and Bhanja, S. (2008) Error-power tradeoffs in QCA design. In: Nanotechnology, 2008. NANO '08. 8th IEEE Conference on, 18-21 August 2008, Arlington, TX.

Srivastava, S. and Sarkar, S. and Bhanja, S. (2009) Estimation of upper bound of power dissipation in QCA circuits. Nanotechnology, IEEE Transactions on, 8 (1). pp. 116-127. ISSN 1536-125X

Srivastava, Saket (2007) Probabilistic modeling of quantum-dot cellular automata. PhD thesis, University of South Florida.

Srivastava, Saket and Sarkar, Sudeep and Bhanja, Sanjukta (2006) Power dissipation bounds and models for quantum-dot cellular automata circuits. In: Nanotechnology, 2006. IEEE-NANO 2006. Sixth IEEE Conference on, 17-20 June 2006, Cinncinati, OH.

V

Venkataramani, P. and Srivastava, S. and Bhanja, S. (2008) Sequential circuit design in quantum-dot cellular automata. In: Nanotechnology, 2008. NANO '08. 8th IEEE Conference on, 18-21 Aug. 2008, Arlington, TX.

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