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A 5-50 Gb/s quarter rate transmitter with a 4-tap multiple-MUX based FFE in 65 nm CMOS

Zheng, Xuqiang, Zhang, Chun, Lv, Fangxu , Zhao, Feng, Yue, Shigang, Wang, Ziqiang, Li, Fule and Wang, Zhihua (2016) A 5-50 Gb/s quarter rate transmitter with a 4-tap multiple-MUX based FFE in 65 nm CMOS. In: ESSCIRC Conference 2016: 42nd European Solid-State Circuits Conference. IEEE, pp. 305-308. ISBN 978-1-5090-2972-3

Full content URL: http://dx.doi.org/10.1109/ESSCIRC.2016.7598303

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Abstract

This paper presents a 5-50 Gb/s quarter-rate transmitter with a 4-tap feed-forward equalization (FFE) based on multiple-multiplexer (MUX). A bandwidth enhanced 4:1 MUX with the capability of eliminating charge-sharing effect is proposed to increase the maximum operating speed. To produce the quarter-rate parallel data streams with appropriate delays, a compact latch array associated with an interleaved-retiming technique is designed. Implemented in 65 nm CMOS technology, the transmitter occupying an area of 0.6 mm2 achieves a maximum data rate of 50 Gb/s with an energy efficiency of 3.1 pJ/bit.

Additional Information:©2016 IEEE
Keywords:radio transmitters, channel estimation, CMOS logic circuits, equalisers, feedforward, flip-flops, multiplexing equipment, parallel processing, Clocks, Latches, Capacitance, Transmitters, Delays, Bandwidth
Subjects:G Mathematical and Computer Sciences > G400 Computer Science
Divisions:College of Science > School of Computer Science
ID Code:27950
Deposited On:08 Aug 2017 09:07

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