An FPGA-based infant monitoring system

Dickinson, Patrick and Appiah, Kofi and Hunter, Andrew and Ormston, Stephen (2005) An FPGA-based infant monitoring system. In: IEEE Conference on Field Programmable Technology, 11-14 Dec 2005, Singapore.

This is the latest version of this item.

Documents
Dickinson2005FPTAnFPGABasedInfantMonitoringSystem.pdf
[img]
[Download]
[img]
Preview
PDF
Dickinson2005FPTAnFPGABasedInfantMonitoringSystem.pdf - Whole Document

130Kb

Abstract

We have designed an automated visual surveillance system for monitoring sleeping infants. The low-level image
processing is implemented on an embedded Xilinx’s Virtex
II XC2v6000 FPGA and quantifies the level of scene activity using a specially designed background subtraction algorithm. We present our algorithm and show how we have
optimised it for this platform.

Item Type:Conference or Workshop Item (Poster)
Additional Information:We have designed an automated visual surveillance system for monitoring sleeping infants. The low-level image processing is implemented on an embedded Xilinx’s Virtex II XC2v6000 FPGA and quantifies the level of scene activity using a specially designed background subtraction algorithm. We present our algorithm and show how we have optimised it for this platform.
Keywords:FPGA, Surveillance, Computer vision
Subjects:G Mathematical and Computer Sciences > G400 Computer Science
G Mathematical and Computer Sciences > G740 Computer Vision
Divisions:College of Science > School of Computer Science
ID Code:84
Deposited By: Patrick Dickinson
Deposited On:23 Feb 2006
Last Modified:13 Mar 2013 08:21

Available Versions of this Item

  • An FPGA-based infant monitoring system. (deposited 23 Feb 2006) [Currently Displayed]

Repository Staff Only: item control page