Dickinson, Patrick and Appiah, Kofi and Hunter, Andrew and Ormston, Stephen (2005) An FPGA-based infant monitoring system. In: IEEE Conference on Field Programmable Technology, 11-14 Dec 2005, Singapore.

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Abstract

We have designed an automated visual surveillance system for monitoring sleeping infants. The low-level image processing is implemented on an embedded Xilinx’s Virtex II XC2v6000 FPGA and quantifies the level of scene activity using a specially designed background subtraction algorithm. We present our algorithm and show how we have optimised it for this platform.

Item Type:	Conference or Workshop Item (Poster)
Additional Information:	We have designed an automated visual surveillance system for monitoring sleeping infants. The low-level image processing is implemented on an embedded Xilinx’s Virtex II XC2v6000 FPGA and quantifies the level of scene activity using a specially designed background subtraction algorithm. We present our algorithm and show how we have optimised it for this platform.
Keywords:	FPGA, Surveillance, Computer vision
Subjects:	G Mathematical and Computer Sciences > G400 Computer Science G Mathematical and Computer Sciences > G740 Computer Vision
Divisions:	College of Sciences > Faculty of Science > Lincoln School of Computer Science
Depositing User:	Patrick Dickinson
Date Deposited:	23 Feb 2006
Last Modified:	13 Mar 2013 08:21
URI:	http://eprints.lincoln.ac.uk/id/eprint/84

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