Image processing applications using a novel parallel computing machine based on reconfigurable logic

Allinson, N. M. and Howard, N. J. and Kolcz, A. R. and Tyrrell, A. M. (1994) Image processing applications using a novel parallel computing machine based on reconfigurable logic. In: IEE Colloquium on Parallel Architectures for Image Processing, 26 May 1994, London.

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Abstract

Zelig is a 32 physical node fine-grained computer employing field-programmable gate arrays. Its application to the high speed implementation of various image pre-processing operations (in particular binary morphology) is described together with typical speed-up results

Item Type:Conference or Workshop Item (Paper)
Additional Information:Zelig is a 32 physical node fine-grained computer employing field-programmable gate arrays. Its application to the high speed implementation of various image pre-processing operations (in particular binary morphology) is described together with typical speed-up results
Keywords:image processing equipment, logic arrays, parallel machines, Zelig
Subjects:G Mathematical and Computer Sciences > G740 Computer Vision
Divisions:College of Science > School of Computer Science
ID Code:5075
Deposited By: Tammie Farley
Deposited On:20 Apr 2012 14:18
Last Modified:13 Mar 2013 09:06

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