The yield enhancement of field-programmable gate arrays

Howard, Neil J. and Tyrell, Andrew M. and Allinson, Nigel M. (1994) The yield enhancement of field-programmable gate arrays. IEEE Transactions on Very Large Scale Integration (VLSI) Systems, 2 (1). pp. 115-123. ISSN 1063-8210

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Abstract

The fine granularity and reconfigurable nature of field-programmable gate arrays (FPGA's) suggest that defect-tolerant methods can be readily applied to these devices in order to increase their maximum economic sizes, through increased yield. This paper identifies the inability to contain faults within single cells and the need for fast reconfiguration as the key obstacles to obtaining a significant increase in yield. Monte Carlo defect modeling of the photolithographic layers of VLSI FPGA's is used as a foundation for the yield modeling of various defect-tolerant architectures. Results suggest that a medium-grain architecture is the best solution, offering a substantial increase in size without significant side effects. This architecture is shown to produce greater gate densities than the alternative approach of realizing ultralarge scale FPGA's-multichip modules.<>

Item Type:Article
Additional Information:The fine granularity and reconfigurable nature of field-programmable gate arrays (FPGA's) suggest that defect-tolerant methods can be readily applied to these devices in order to increase their maximum economic sizes, through increased yield. This paper identifies the inability to contain faults within single cells and the need for fast reconfiguration as the key obstacles to obtaining a significant increase in yield. Monte Carlo defect modeling of the photolithographic layers of VLSI FPGA's is used as a foundation for the yield modeling of various defect-tolerant architectures. Results suggest that a medium-grain architecture is the best solution, offering a substantial increase in size without significant side effects. This architecture is shown to produce greater gate densities than the alternative approach of realizing ultralarge scale FPGA's-multichip modules.<>
Keywords:VLSI implementation, circuit layout, circuit reliability, logic arrays, logic design, logic testing, multichip modules, network routing, redundancy, semiconductor device modules, Monte Carlo methods
Subjects:G Mathematical and Computer Sciences > G490 Computing Science not elsewhere classified
Divisions:College of Science > School of Computer Science
ID Code:5072
Deposited By: Tammie Farley
Deposited On:20 Apr 2012 13:42
Last Modified:13 Mar 2013 09:06

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