Accelerated hardware video object segmentation: From foreground detection to connected components labelling

Appiah, Kofi and Hunter, Andrew and Meng, Fanyi and Dickinson, Patrick (2010) Accelerated hardware video object segmentation: From foreground detection to connected components labelling. Computer vision and image understanding, 114 (11). pp. 1282-1291. ISSN 1077-3142

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Official URL: http://dx.doi.org/10.1016/j.cviu.2010.03.021

Abstract

This paper demonstrates the use of a single-chip FPGA for the segmentation of moving objects in a video sequence. The system maintains highly accurate background models, and integrates the detection of foreground pixels with the labelling of objects using a connected components algorithm. The background models are based on 24-bit RGB values and 8-bit gray scale intensity values. A multimodal background differencing algorithm is presented, using a single FPGA chip and four blocks of RAM. The real-time connected component labelling algorithm, also designed for FPGA implementation, run-length encodes the output of the background subtraction, and performs connected component analysis on this representation. The run-length encoding, together with other parts of the algorithm, is performed in parallel; sequential operations are minimized as the number of run-lengths are typically less than the number of pixels. The two algorithms are pipelined together for maximum efficiency.

Item Type:Article
Keywords:accelerated hardware object, Background differencing, Image segmentation, Connected component labelling, Object extraction, FPGA
Subjects:G Mathematical and Computer Sciences > G400 Computer Science
Divisions:College of Science > School of Computer Science
ID Code:2753
Deposited By: Rosaline Smith
Deposited On:07 Jul 2010 14:35
Last Modified:04 Dec 2013 16:03

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