Security issues in QCA circuit design: power analysis attacks

Liu, Weiqiang and Srivastava, Saket and O'Neill, Maire and Swartzlander Jr., Earl E. (2014) Security issues in QCA circuit design: power analysis attacks. In: Field-Coupled Nanocomputing: Paradigms, Progress, and Perspectives. Springer Verlag, Tampa, FL, pp. 194-222. ISBN 9783662437216, 9783662437223

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Abstract

Quantum-dot cellular automata (QCA) technology has advantages of fast computation performance, high density and low power consumption. Thus, it is believed that QCA is attractive for designing future digital systems. Side channel attacks including power analysis attacks have become a significant threat to the security of cryptographic circuits using CMOS technology. A power analysis attack can reveal the secret key of a cryptographic cipher by measuring the power consumption of the cipher's hardware platform while it is encrypting or decrypting data. As the power consumption of QCA circuits is extremely low when compared to their CMOS counterparts, it may be possible to build cryptographic circuits that are immune to power analysis attacks by using QCA technology. Therefore, in this chapter an investigation into both the best and worst case scenarios for attackers is carried out to ascertain if QCA circuits have such an advantage. A more efficient QCA design of a sub-module of the Serpent cipher is proposed and compared to a previous design. By using an upper bound power model, the first power analysis attack of a QCA cryptographic circuit (Serpent sub-module) is presented. The results show that in the best case scenario for attackers, QCA cryptographic circuits would be vulnerable to power analysis attack. However, the security of practical QCA circuits can be greatly improved by applying a smoother clock. Moreover, in the worst case scenario, reversible QCA circuits with Bennett clocking could be used as a natural countermeasure to power analysis attack. Therefore, it is believed that QCA could be a niche technology in the future for the implementation of security architectures resistant to power analysis attack. © 2014 Springer-Verlag.

Keywords:Clocks, CMOS integrated circuits, Cryptography, Integrated circuit manufacture, Sequential machines, Power analysis attack, Power model, Quantum-dot cellular automata, S-box, Security Architecture, Serpent cipher, Electric network analysis
Subjects:H Engineering > H611 Microelectronic Engineering
G Mathematical and Computer Sciences > G400 Computer Science
H Engineering > H690 Electronic and Electrical Engineering not elsewhere classified
H Engineering > H600 Electronic and Electrical Engineering
H Engineering > H610 Electronic Engineering
Divisions:College of Science > School of Engineering
ID Code:14643
Deposited On:08 Aug 2014 11:35

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